This invention relates to the field of programmable read only memories (PROM's) and more particularly to low power, low voltage PROM's that find application in battery operated personal paging receivers.
In the design of selective call personal paging receivers it is desirable to prolong the operating time between battery charges or replacement. As the physical size of paging receivers has been reduced over the years, the size and electrical capacity of their batteries have also been reduced, potentially causing a corresponding reduction in the paging receiver's operating time. To compensate for the reduced battery capacity it is desirable to develop paging receiver circuits that achieve the lowest power consumption possible. Development work has been directed towards reducing the power drain of some paging receiver circuits. This work has led to the development of both low power circuit designs and to the development of sophisticated switching methods, or "battery saver techniques", whereby portions of the paging receiver are switched ON only for brief intervals and only when they are required to be on, as determined by the selective call coding protocol.
A paging receiver is usually powered from a one cell battery having a voltage in the range of 1.1 to 1.5 volts. Ideally, the paging receiver circuits are powered directly from the battery, however, some circuits will not operate at these low voltages and it becomes necessary to add a DC-DC converter to step-up the voltage. Because DC-DC converters are less than 100% efficient and they require larger and more expensive components as their load increases, it is desirable to operate as few circuits as possible from the DC-DC converter.
Present designs of paging receivers typically contain a single chip microcomputer. These microcomputers include an internal mask programmable read only memory (ROM) wherein the majority of the microcomputer's software is stored. Since these microcomputers are produced in volume, individualized software is not possible.
The paging receiver, however, has a requirement that some of the software be individualized. One of the more important requirements is that the paging receiver have a unique address, such that a central base station can "page" one receiver while excluding all other paging receivers in the system. Because of the requirement for unique software, it becomes necessary to add a small PROM peripheral to the microcomputer wherein address and other individualized data can be stored. In this application, the PROM is referred to as a "code plug".
Presently, PROM's have been fabricated using well known integrated circuit technologies such as NMOS, CMOS, and TTL. These circuits, however, fail to meet one or both of the aforementioned goals for use in a paging receiver, more specifically, low power drain and operation down to 1.1 volts, or less.
PROM circuits may be comprised of a matrix of memory elements arranged between row and column conductors, with each memory element connecting a unique combination of one row conductor to one column conductor. The state of the memory element is determined by its conductivity, i.e. shorted or open.
To read the memory element state, a column driver attempts to source current to the column conductor and a selectively activated row driver circuit sinks this current if the memory element is shorted. If the memory element is shorted, the voltage at the column conductor is low, while if the memory element is open the voltage at the column conductor is high. An output circuit senses the low or high voltage on the column conductor and appropriately outputs a one or a zero.
Programming is accomplished by placing a large current through a selected memory element. Some memory elements, for example the well known nickel chromium link, change from the shorted state to the open state when programmed. Conversely, the Zener diode memory elements described in the preferred embodiment, change from the open state to the shorted state when programmed.
Regardless of the direction of programming, the row driver circuit must be capable of handling this additional programming current. Since the programming mode is infrequently used it is undesirable, for power consumption considerations, to have a row driver circuit with a continuously large current sinking capability. It would be preferred to have a row driver circuit that adapts itself to the wide differences of current sinking capability that exist between the read and program modes, thereby drawing minimal power in the read mode.
Prior art PROM's normally require at least one additional terminal to switch the device between the read and program modes, while others require more. Because of the aforementioned reduced physical size of paging receivers, it is desirable that the PROM have a minimum number of interconnecting terminals. Additional terminals not only require larger packages to contain the PROM, such as larger chip carriers, and an increase in the complexity of the circuits interfaced to the PROM, but also require an increase in the number of interconnecting conductors. All of these factors increase space requirements. Therefore, it would be desirable to have a PROM that requires no more terminals for the program mode than is required for the read mode.